--  BCAD_1149_1_1994    VHDL Package and Package Body in support of 
--  BSDL Version 0.0
--

package BCAD_1149_1_1994 is             -- Created 940825

use STD_1149_1_1994.all;

 -- Boundary Cell deferred constants (see package body)

 constant BC_A  : CELL_INFO; 
 constant BC_B  : CELL_INFO; 
 constant BC_H  : CELL_INFO; 

 -- Boundary Register declarations

 -- Miscellaneous

end BCAD_1149_1_1994;


package body BCAD_1149_1_1994 is

use STD_1149_1_1994.all;


-- The BC_A bidir is a capture-only shared bidir cell.
-- These cells do not support INTEST.

constant BC_A : CELL_INFO := 
 ((BIDIR_IN, EXTEST,  PI),  (BIDIR_OUT, EXTEST,  PI),
  (BIDIR_IN, SAMPLE,  PI),  (BIDIR_OUT, SAMPLE,  PI));


-- The BC_B bidir is a capture and control shared bidir cell.
-- The core logic is not protected from data ripple during scanning.
-- When MD=1 the core logic is sourced by the scan flip-flop,
-- allowing this cell to provide random patterns to the logic during BIST.

constant BC_B : CELL_INFO := 
 ((BIDIR_IN, EXTEST,  PI),  (BIDIR_OUT, EXTEST,  PI),
  (BIDIR_IN, SAMPLE,  PI),  (BIDIR_OUT, SAMPLE,  PI),
  (BIDIR_IN, INTEST,  PI),  (BIDIR_OUT, INTEST,  PI));


-- The BC_H output2 cells are used for high-speed outputs
-- The BC_H control cells are used for high-speed control
-- These cells do not support INTEST.

constant BC_H : CELL_INFO :=
 ((OUTPUT2,  EXTEST,  UPD), (OUTPUT3, EXTEST,  UPD),
  (OUTPUT2,  SAMPLE,  PI), (OUTPUT3, SAMPLE,  PI),
  (CONTROL, EXTEST,  UPD), (CONTROLR, EXTEST,  UPD),
  (CONTROL, SAMPLE,  PI), (CONTROLR, SAMPLE,  PI));


end BCAD_1149_1_1994;  -- End of Package Body


