-- ********************************************************************* -- * * -- * ispLSI1024EA 100pin TQFP BSDL Model * -- * copyright 1996-2000, Lattice Semiconductor Corporation * -- * IEEE 1149.1b-1994 * -- * Standard Test Access Port and Boundary-Scan Architecture * -- * VHDL Description File * -- * * -- * Date: May 01 2000 * -- * File Version: v2.0-00 * -- * This BSDL file was made by Generate_BDF v. 1.1 * -- * * -- * This BSDL file has been syntax checked with: * -- * - Teradyne VICTORY * -- * - Asset-Intertech * -- * * -- ********************************************************************* -- * * -- * E2CMOS, GAL, ispGAL, pDS, pLSI, Silicon Forest and UltraMOS are * -- * registered trademarks of Lattice Semiconductor Corporation * -- * * -- * Generic Array Logic, ISP, ispCODE, ispDOWNLOAD, ispGDS, ispLSI * -- * ispSTREAM, Latch-Lock, pDS+ and RFT are trademarks of Lattice * -- * Semiconductor Corporation. * -- * * -- ********************************************************************* -- * * -- * IMPORTANT * -- * * -- * The following is a BSDL file that tests all of the I/O pins * -- * as bidirectional pins. The functionality of the BSCAN register * -- * for this device is independent of the pattern programmed * -- * into the device. An additional programming step is not * -- * required to configure the I/O pins prior to BSCAN test. * -- * * -- ********************************************************************* -- The Overall Structure of the Entity Description entity ispLSI1024EA is -- Generic Parameter Statement generic (PHYSICAL_PIN_MAP : string := "TQFP_100"); -- Logical Port Description Statement port ( TDI: in bit; -- JTAG input pin TMS: in bit; -- JTAG input pin TCK: in bit; -- JTAG input pin TDO: out bit; -- JTAG output pin RESET: in bit; -- Active low RESET pin GOE: in bit_vector (0 to 1); -- Global Output Enable Clk: in bit_vector (0 to 3); -- Clock input pins NoC: linkage bit_vector (0 to 23); -- No connect pins BIp: inout bit_vector (0 to 47); -- Bi-Directional pins VCC: linkage bit_vector (0 to 8); -- VCC pins GND: linkage bit_vector (0 to 7) -- GND pins ); -- Version Control use STD_1149_1_1994.all; -- 1149.1-1994 attributes -- Component Conformance Statement attribute COMPONENT_CONFORMANCE of ispLSI1024EA : entity is "STD_1149_1_1993"; -- Device Package Pin Mapping attribute PIN_MAP of ispLSI1024EA : entity is PHYSICAL_PIN_MAP; constant TQFP_100: PIN_MAP_STRING:= "TDI:18," & -- JTAG (TDI) input pin "TMS:68," & -- JTAG (TMS) input pin "TCK:58," & -- JTAG (TCK) input pin "TDO:35," & -- JTAG (TDO) output pin "RESET:17," & -- RESET input pin "GOE:( 91, 8), " & -- Global OE pins "Clk:( 9, 67, 60, 59), " & -- Clock pins "NoC:( 1, 2, 12, 13, 24, 25, 26, " & -- No Connect pins " 27, 38, 39, 49, 50, 51, 52, " & -- No Connect pins " 63, 64, 74, 75, 76, 77, 87, " & -- No Connect pins " 88, 99, 100), " & -- No Connect pins "BIp:( 19, 20, 21, 22, 23, 28, 29, " & -- I/O pins " 30, 31, 32, 33, 34, 42, 43, " & -- I/O pins " 44, 45, 46, 47, 48, 53, 54, " & -- I/O pins " 55, 56, 57, 69, 70, 71, 72, " & -- I/O pins " 73, 78, 79, 80, 81, 82, 83, " & -- I/O pins " 84, 92, 93, 94, 95, 96, 97, " & -- I/O pins " 98, 3, 4, 5, 6, 7), " & -- I/O pins "VCC:( 10, 11, 40, 41, 65, 66, 85, " & -- VCC pins " 86, 16), " & -- VCC pins "GND:( 14, 15, 36, 37, 61, 62, 89, " & -- GND pins " 90) " ; -- GND pins -- Scan Port Identification attribute TAP_SCAN_CLOCK of TCK : Signal is (5.0e6, BOTH); attribute TAP_SCAN_IN of TDI : Signal is True; attribute TAP_SCAN_OUT of TDO : Signal is True; attribute TAP_SCAN_MODE of TMS : Signal is True; -- Instruction Register Description attribute INSTRUCTION_LENGTH of ispLSI1024EA : entity is 5; attribute INSTRUCTION_OPCODE of ispLSI1024EA : entity is "BYPASS (11111), " & "SAMPLE (11100), " & "EXTEST (00000), " & "IDCODE (10110), " & "USERCODE (10111), " & "HIGHZ (11000), " & "ADDSHFT (00001), " & "DATASHFT (00010), " & "UBE (10000), " & "PRGM (00111), " & "VFY (10010), " & "PRGMSC (01001), " & "PRIVATE (00011,00100,00101,00110,01000,01010, " & "01011,01100,01110,01111,10001,10011, " & "10100,10101,11001,11010,11011,11101, " & "11110)" ; attribute INSTRUCTION_CAPTURE of ispLSI1024EA : entity is "11001"; attribute INSTRUCTION_PRIVATE of ispLSI1024EA : entity is "PRIVATE"; -- IDCODE Definition attribute IDCODE_REGISTER of ispLSI1024EA: entity is "0000" & -- version "0000001100101101" & -- part number (032D) "00000100001" & -- manufacturer's identity "1" ; -- required by 1149.1 -- USERCODE Definition attribute USERCODE_REGISTER of ispLSI1024EA: entity is "11111111111111111111111111111111"; -- Register Access Description attribute REGISTER_ACCESS of ispLSI1024EA : entity is "BOUNDARY (SAMPLE, EXTEST), " & "BYPASS (BYPASS, HIGHZ), " & "ADDREG[122] (ADDSHFT), " & "DATAREG[240] (DATASHFT), " & "UBEREG[1] (UBE), " & "PRGREG[122] (PRGM), " & "VFYREG[240] (VFY), " & "SECREG[1] (PRGMSC) " ; -- ********************************************************************** -- Boundary Scan Register Description, Cell 0 is the closest to TDO -- ********************************************************************** attribute BOUNDARY_LENGTH of ispLSI1024EA : entity is 151; attribute BOUNDARY_REGISTER of ispLSI1024EA : entity is -- num cell port function safe [ccell disval rslt] "0150 (BC_1, *, control, 0)," & "0149 (BC_1, BIp(23), output3, x, 150, 0, z)," & "0148 (BC_1, BIp(23), input, x)," & "0147 (BC_1, *, control, 0)," & "0146 (BC_1, BIp(22), output3, x, 147, 0, z)," & "0145 (BC_1, BIp(22), input, x)," & "0144 (BC_1, *, control, 0)," & "0143 (BC_1, BIp(21), output3, x, 144, 0, z)," & "0142 (BC_1, BIp(21), input, x)," & "0141 (BC_1, *, control, 0)," & "0140 (BC_1, BIp(20), output3, x, 141, 0, z)," & "0139 (BC_1, BIp(20), input, x)," & "0138 (BC_1, *, control, 0)," & "0137 (BC_1, BIp(19), output3, x, 138, 0, z)," & "0136 (BC_1, BIp(19), input, x)," & "0135 (BC_1, *, control, 0)," & "0134 (BC_1, BIp(18), output3, x, 135, 0, z)," & "0133 (BC_1, BIp(18), input, x)," & "0132 (BC_1, *, control, 0)," & "0131 (BC_1, BIp(17), output3, x, 132, 0, z)," & "0130 (BC_1, BIp(17), input, x)," & "0129 (BC_1, *, control, 0)," & "0128 (BC_1, BIp(16), output3, x, 129, 0, z)," & "0127 (BC_1, BIp(16), input, x)," & "0126 (BC_1, *, control, 0)," & "0125 (BC_1, BIp(15), output3, x, 126, 0, z)," & "0124 (BC_1, BIp(15), input, x)," & "0123 (BC_1, *, control, 0)," & "0122 (BC_1, BIp(14), output3, x, 123, 0, z)," & "0121 (BC_1, BIp(14), input, x)," & "0120 (BC_1, *, control, 0)," & "0119 (BC_1, BIp(13), output3, x, 120, 0, z)," & "0118 (BC_1, BIp(13), input, x)," & "0117 (BC_1, *, control, 0)," & "0116 (BC_1, BIp(12), output3, x, 117, 0, z)," & "0115 (BC_1, BIp(12), input, x)," & "0114 (BC_1, *, control, 0)," & "0113 (BC_1, BIp(11), output3, x, 114, 0, z)," & "0112 (BC_1, BIp(11), input, x)," & "0111 (BC_1, *, control, 0)," & "0110 (BC_1, BIp(10), output3, x, 111, 0, z)," & "0109 (BC_1, BIp(10), input, x)," & "0108 (BC_1, *, control, 0)," & "0107 (BC_1, BIp(9), output3, x, 108, 0, z)," & "0106 (BC_1, BIp(9), input, x)," & "0105 (BC_1, *, control, 0)," & "0104 (BC_1, BIp(8), output3, x, 105, 0, z)," & "0103 (BC_1, BIp(8), input, x)," & "0102 (BC_1, *, control, 0)," & "0101 (BC_1, BIp(7), output3, x, 102, 0, z)," & "0100 (BC_1, BIp(7), input, x)," & "0099 (BC_1, *, control, 0)," & "0098 (BC_1, BIp(6), output3, x, 99, 0, z)," & "0097 (BC_1, BIp(6), input, x)," & "0096 (BC_1, *, control, 0)," & "0095 (BC_1, BIp(5), output3, x, 96, 0, z)," & "0094 (BC_1, BIp(5), input, x)," & "0093 (BC_1, *, control, 0)," & "0092 (BC_1, BIp(4), output3, x, 93, 0, z)," & "0091 (BC_1, BIp(4), input, x)," & "0090 (BC_1, *, control, 0)," & "0089 (BC_1, BIp(3), output3, x, 90, 0, z)," & "0088 (BC_1, BIp(3), input, x)," & "0087 (BC_1, *, control, 0)," & "0086 (BC_1, BIp(2), output3, x, 87, 0, z)," & "0085 (BC_1, BIp(2), input, x)," & "0084 (BC_1, *, control, 0)," & "0083 (BC_1, BIp(1), output3, x, 84, 0, z)," & "0082 (BC_1, BIp(1), input, x)," & "0081 (BC_1, *, control, 0)," & "0080 (BC_1, BIp(0), output3, x, 81, 0, z)," & "0079 (BC_1, BIp(0), input, x)," & "0078 (BC_1, *, control, 0)," & "0077 (BC_1, BIp(24), output3, x, 78, 0, z)," & "0076 (BC_1, BIp(24), input, x)," & "0075 (BC_1, *, control, 0)," & "0074 (BC_1, BIp(25), output3, x, 75, 0, z)," & "0073 (BC_1, BIp(25), input, x)," & "0072 (BC_1, *, control, 0)," & "0071 (BC_1, BIp(26), output3, x, 72, 0, z)," & "0070 (BC_1, BIp(26), input, x)," & "0069 (BC_1, *, control, 0)," & "0068 (BC_1, BIp(27), output3, x, 69, 0, z)," & "0067 (BC_1, BIp(27), input, x)," & "0066 (BC_1, *, control, 0)," & "0065 (BC_1, BIp(28), output3, x, 66, 0, z)," & "0064 (BC_1, BIp(28), input, x)," & "0063 (BC_1, *, control, 0)," & "0062 (BC_1, BIp(29), output3, x, 63, 0, z)," & "0061 (BC_1, BIp(29), input, x)," & "0060 (BC_1, *, control, 0)," & "0059 (BC_1, BIp(30), output3, x, 60, 0, z)," & "0058 (BC_1, BIp(30), input, x)," & "0057 (BC_1, *, control, 0)," & "0056 (BC_1, BIp(31), output3, x, 57, 0, z)," & "0055 (BC_1, BIp(31), input, x)," & "0054 (BC_1, *, control, 0)," & "0053 (BC_1, BIp(32), output3, x, 54, 0, z)," & "0052 (BC_1, BIp(32), input, x)," & "0051 (BC_1, *, control, 0)," & "0050 (BC_1, BIp(33), output3, x, 51, 0, z)," & "0049 (BC_1, BIp(33), input, x)," & "0048 (BC_1, *, control, 0)," & "0047 (BC_1, BIp(34), output3, x, 48, 0, z)," & "0046 (BC_1, BIp(34), input, x)," & "0045 (BC_1, *, control, 0)," & "0044 (BC_1, BIp(35), output3, x, 45, 0, z)," & "0043 (BC_1, BIp(35), input, x)," & "0042 (BC_1, *, control, 0)," & "0041 (BC_1, BIp(36), output3, x, 42, 0, z)," & "0040 (BC_1, BIp(36), input, x)," & "0039 (BC_1, *, control, 0)," & "0038 (BC_1, BIp(37), output3, x, 39, 0, z)," & "0037 (BC_1, BIp(37), input, x)," & "0036 (BC_1, *, control, 0)," & "0035 (BC_1, BIp(38), output3, x, 36, 0, z)," & "0034 (BC_1, BIp(38), input, x)," & "0033 (BC_1, *, control, 0)," & "0032 (BC_1, BIp(39), output3, x, 33, 0, z)," & "0031 (BC_1, BIp(39), input, x)," & "0030 (BC_1, *, control, 0)," & "0029 (BC_1, BIp(40), output3, x, 30, 0, z)," & "0028 (BC_1, BIp(40), input, x)," & "0027 (BC_1, *, control, 0)," & "0026 (BC_1, BIp(41), output3, x, 27, 0, z)," & "0025 (BC_1, BIp(41), input, x)," & "0024 (BC_1, *, control, 0)," & "0023 (BC_1, BIp(42), output3, x, 24, 0, z)," & "0022 (BC_1, BIp(42), input, x)," & "0021 (BC_1, *, control, 0)," & "0020 (BC_1, BIp(43), output3, x, 21, 0, z)," & "0019 (BC_1, BIp(43), input, x)," & "0018 (BC_1, *, control, 0)," & "0017 (BC_1, BIp(44), output3, x, 18, 0, z)," & "0016 (BC_1, BIp(44), input, x)," & "0015 (BC_1, *, control, 0)," & "0014 (BC_1, BIp(45), output3, x, 15, 0, z)," & "0013 (BC_1, BIp(45), input, x)," & "0012 (BC_1, *, control, 0)," & "0011 (BC_1, BIp(46), output3, x, 12, 0, z)," & "0010 (BC_1, BIp(46), input, x)," & "0009 (BC_1, *, control, 0)," & "0008 (BC_1, BIp(47), output3, x, 9, 0, z)," & "0007 (BC_1, BIp(47), input, x)," & "0006 (BC_1, GOE(1), input, x)," & "0005 (BC_1, GOE(0), input, x)," & "0004 (BC_1, Clk(3), input, x)," & "0003 (BC_1, Clk(2), input, x)," & "0002 (BC_1, Clk(1), input, x)," & "0001 (BC_1, Clk(0), input, x)," & "0000 (BC_1, RESET, input, x)"; end ispLSI1024EA;