The following describes the function of the test pattern project (ispLEVER design project) found in this .zip file. These files are intended for use with Lattice ispLEVER and ispVM System software.

The files include:
xp10standardboard.syn: ispLEVER project file
xp10_std_BdA.v: Verilog source file
zp10standardboard.lpf: ispLEVER preference file (contains pin locations, etc)
sp10_std_BdA_tb.v: testbench file
xp10_std_bda.jed: programming file (for use with ispVM system)

For more information on the ispLEVER and ispVM software, please see:
www.latticesemi.com/software

This test pattern is loaded onto all new LatticeXP Standard Evaluation boards when shipped.

Description of operation:

Setting all of the DIP switches to ON causes the LEDs count in one direction, setting all of the DIP switches to OFF reverses the 
direction. If the switches are not all ON or OFF the LEDs for the switches that are ON will light up.

Additionally, many of the other I/O pins are toggled by an internal counter. The output pins that are toggled can be selected by using the ispLEVER Preference Editor.


If you have any technical questions, please contact Lattice technical 
support at: 

   1-800-Lattice [528-8423] North America 1-503-268-8001 Outside North 
   America techsupport@latticesemi.com

Or visit our website at:

http://www.latticesemi.com