-- =============================================================================
--                           COPYRIGHT NOTICE
-- Copyright 2003 (c) Lattice Semiconductor Corporation
-- ALL RIGHTS RESERVED
-- This confidential and proprietary software may be used only as authorised by
-- a licensing agreement from Lattice Semiconductor Corporation.
-- The entire notice above must be reproduced on all authorized copies and
-- copies may only be made to the extent permitted by a licensing agreement from
-- Lattice Semiconductor Corporation.
--
-- Lattice Semiconductor Corporation        TEL : 1-800-Lattice (USA and Canada)
-- 5555 NE Moore Court                            408-826-6000 (other locations)
-- Hillsboro, OR 97124                     web  : http://www.latticesemi.com/
-- U.S.A                                   email: techsupport@latticesemi.com
-- =============================================================================
--                         FILE DETAILS
-- Project          : Memory Controller
-- File 	    : ddrct_gen_e2_1_001_params.vhd
-- Title            : Parameters defined by the GUI
-- =============================================================================
--                        REVISION HISTORY
-- Version          : 1.0
-- Mod. Date        : Dec 6, 2004
-- Changes Made     : Initial Creation
-- =============================================================================


library ieee;
   use ieee.std_logic_1164.all;

package ddrct_gen_e2_1_001_params is

constant DATA_WIDTH 		: integer := 32;
constant DATA_SIZE_32 		: boolean := TRUE;
constant DSIZE			: integer := DATA_WIDTH * 2;
constant USER_DM		: integer := DSIZE/8;
constant ROW_WIDTH		: integer := 12;
constant COL_WIDTH		: integer := 9;
constant COL_WIDTH_LT_10	: boolean := TRUE;
constant CS_WIDTH		: integer := 1;
constant CS_WIDTH_1		: boolean := TRUE;
constant BSIZE			: integer := 2;
constant TRAS			: std_logic_vector(4 downto 0) := "01000"; -- 5'd8
constant TRC			: std_logic_vector(4 downto 0) := "01011"; -- 5'd11
constant TRCD			: std_logic_vector(2 downto 0) := "011"; -- 3'd3
constant TRRD			: std_logic_vector(2 downto 0) := "010"; -- 3'd2
constant TRFC			: std_logic_vector(4 downto 0) := "01110"; -- 5'd14
constant TRP			: std_logic_vector(2 downto 0) := "011"; -- 3'd3
constant TMRD			: std_logic_vector(2 downto 0) := "010"; -- 3'd2
constant TWR			: std_logic_vector(2 downto 0) := "011"; -- 3'd3
constant TREFI			: std_logic_vector(15 downto 0):= "0000101100110101"; --16'h0b35
constant EXT_REG_EN		: std_logic := '0';
constant AR_BURST_EN		: std_logic_vector(2 downto 0) := "001"; -- 3'd1
constant DATA_VALID_TAP		: bit_vector (1 downto 0) := "00"; -- 2'd0
constant PIO_RD_DQS0		: std_logic_vector(3 downto 0) := "1000"; -- 4'b1000
constant PIO_RD_DQS1		: std_logic_vector(3 downto 0) := "1000"; -- 4'b1000
constant PIO_RD_DQS2		: std_logic_vector(3 downto 0) := "1000"; -- 4'b1000
constant PIO_RD_DQS3		: std_logic_vector(3 downto 0) := "1000"; -- 4'b1000
constant ECP			: boolean := TRUE;
constant ECP_TRUE		: boolean := TRUE;
constant ADDR_WIDTH		: integer := 23;

end ddrct_gen_e2_1_001_params;
